Fpga Dsp Engineers Lecce

Fpga Dsp Engineers
Lecce
Puglia, Lecce

General description and main responsibilities**:

CORTUS is working on the next generation of IoT connectivity modems building up 5G massive Machine Type Communication (mMTC) chipset that will define ultra-low power, high reliability and low-cost benchmarks for SoC products.

To become a chip leader in wireless connectivity for the IoT market, we are looking for Mid/Senior FPGA/DSP Design Engineers (M/F) for our R&D centers of excellence.

The ideal applicants should be familiar on working in a multicultural environment and with teams spread over several sites.

**Minimum requirements**:

- Engineering Msc.

or Bsc.

degree in Electronics/Telecommunications/Computer Science or equivalent;

- Deep experience in design, simulate and implement synthesizable RTL for high performance DSP functions on FPGAs platform using VHDL or Verilog;

- Deep Experience in FPGA design, simulation / verification, synthesis, timing constraints and timing closure, clock domain crossing, verification and debugging;

- Experience to perform architecture and RTL design of 5G NB-IoT and BLE wireless communication systems including documentation, RTL coding, unit and system level simulation;

- Experience with ModelSim, Microsemi Libero, Matlab/Simulink, or equivalent, main FPGA software suite (e. g.

Vivado, Quartus), and Git/Gitlab integration;

- Capability to handle board level integration with hardware, software and drive developers;

- Knowledge of implementing Finite Impulse Response (FIR & IIR) Filters, Fast Fourier Transform (FFT), Discrete Fourier Transform (DFT), Kalman filter, noise estimation, etc.

design structures;

- Scheduling and reporting activities;

- English language written and spoken;

- Proven communication/interpersonal skills;

- Able to assume responsibility for a variety of technical tasks and troubleshooting;

- Strong sense of responsibility and ability to achieve deadlines.

**Highly preferred skills (plus)**:

- Familiar with OFDM digital signa modulation and demodulation;

- Experience with RISK-V ISA;

- Experience in UVM process and Coverage-Driven Constrained Random functional verification;

- Software development using C/C++;

- Script programming language (e. g.

perl, shell, phyton);

- Familiar with real-time embedded software (especially debugging).

Full time with permanent contract

Primary locations: LECCE, (Apulia region), Italy

web interfaces.

Periodical open Q&A sessions with the executive team.

Open time-off policy paired with a profound

respect for work/life balance.