Principal Verification Engineer Milano

Principal Verification Engineer
Milano
Lombardia, Milano

ON Semiconductor's Power Management Division is hiring a Principal Verification Engineer with strong experience in both top and block level verification of integrated circuits using System Verilog, UVM, and assertion-based verification. The candidate must be able to work in a global team, extract hardware and firmware design information from a given specification, and create verification plans to maximize the functional and code coverage targets. Responsibilities:Create top and block level verification test plans based on the specification of power management integrated circuits. Build and maintain the verification environment. Drive the quality to achieve maximum targets of code and functional coverage. Drive innovation in verification technology. Assure the coverage of any component of the integrated circuit: hardware and software. Be responsible for analyzing and debugging failures. Lead a project from the planning phase to mass production delivery, focusing on pre-silicon performances. Provide written and oral communication with the development team regarding coverage reviews, code reviews, deliverables, project updates, and issues.

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