Product Verification Engineer Bardi

Product Verification Engineer
Bardi
Emilia Romagna, Bardi

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever.

As a Non-Volatile Engineering (NVE) Managed NAND Engineer at Micron Technology, Inc. , you will be responsible for ASIC verification when integrated and the electrical characterization of the Managed NAND.

Successful completion of these responsibilities requires skills in different lab tools and testers as well as skill in failure analysis/problem solving experience with mass memory interface host behavior and test programs development.

You will be responsible for defining how the measure must be performed and maintaining a lab setup capable of characterizing the electrical behavior of our products.

You will create and maintain product documentation, ensure necessary resources, and analyze product data. You will work closely with Quality Assurance, Design, Firmware, Applications Engineering, and HVM PE to ensure product reliability. You will also be asked to learn new product knowledge.

Responsibilities and Tasks

Execute product characterization Actively participate in all phases of product characterization and verification to continuously improve product quality and reliability through test development Perform signal integrity and power consumption measurements on devices running at interface frequency up to 10GHz (PHY Interfaces) Validate compliance with industry standards such as M-PHY, UniPro, and UFS Develop verification test program/sequence based on specifications and application usage model Report data in a clear format including concise comments about findings and drive root cause and corrective action with other internal engineering groups Perform Electrical Failure Analysis (EFA) and risk assessment at all decision points within the verification cycle Collaborate to develop the DFMEA (Design Failure Mode Effect Analysis), DFT (Design For Testability), DFM (Design For Manufacturability) Develop test plans and support in Laboratory test activities Create unit tests and integrate with automation frameworks Support issue resolution during proliferation design-in and customer mass production Collaborate with the marketing application engineering team to manage application notes, risk assessment, and "errata" versus datasheet Education

Required:

Master's degree in electronic engineering, Telecommunications, or similar PhD in Electronic Engineering or similar Experience

Required:

Knowledge of signal integrity theory and proven experience with measurements above 10GHz Knowledge of lab equipment, in particular oscilloscopes, protocol analyzers, and logic analyzers Familiarity with device and PCB design processes for high-speed frequency Knowledge and usage of Python or C/C++, and other software tools A mixed experience of HW/FW/SW Knowledge of Multigigabit transceivers architecture Familiarity with ASIC design processes 3-4 years' experience in any of the following: High-speed Engineering measurement High-speed protocol analysis #J-18808-Ljbffr