Senior Asic Design Engineer Venezia

Senior Asic Design Engineer
Venezia
Veneto, Venezia

Senior ASIC Design EngineerRemote, ItalyMy Client is looking for a Senior ASIC Design Engineer to join their hardware design team.

In this key role, you will contribute to developing advanced AI-driven silicon solutions, ensuring optimal performance, power efficiency, and scalability. Key ResponsibilitiesCollaborate with cross-functional teams to define and implement complex design specifications. Architect and optimize micro-architectures for performance, power, and area (PPA). Conduct block/system-level RTL coding, integrating IPs/Sub IPs into the SoC. Perform static checks (lint, CDC, equivalence) and automate tasks for efficiency. Work with verification engineers to ensure design correctness through functional verification. Contribute to design reviews and collaborate with physical design engineers on DFM/DFT considerations. Minimum RequirementsAdvanced degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in silicon logical design, from concept to tapeout. Strong knowledge of ASIC RTL, SystemVerilog, synthesis, timing analysis, DFT, and SVA. Proficiency in EDA tools and scripting (Python, TCL) for automation. Excellent analytical, problem-solving, and debugging skills. Leadership: mentoring junior engineers and participating in interviews. Strong communication skills, including proactive collaboration in a remote, diverse environment. Beneficial ExperienceKnowledge of PCIe, UCIe, Ethernet, LPDDR5, LPDDR6, GDDR7 is useful but not essential.

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