Vhdl Developer Lazio

Vhdl Developer
Roma
Lazio, Lazio

TXT Group is an international, IT end-to-end provider of consultancy, software solutions and services, supporting the digital transformation of customers' products and core processes.

With a proprietary software portfolio and deep expertise in vertical domains, TXT Group operates across different markets, with a growing footprint in Aerospace, Aviation, Defense, Industrial, Government and Fintech.

The holding company, TXT e-Solutions, has been listed on the Italian Stock Exchange - STAR segment (TXT. MI) - since July 2000.

TXT Group headquartered in Milan and has subsidiaries in Italy, Germany, the United Kingdom, France, Switzerland and the United States of America.

VHDL Developer:

In this moment of strong expansion, TXT e-Tech, a company belonging to TXT Group, is looking for a VHDL Developer with at least four years of experience for an opportunity in the field of military radars.

All activities will take place in a context of international collaboration.

Main responsibilities:

VHDL FPGA design of Military Radars;

Creation of VHDL testbenches for functional verification;

Use of the Xilinx Vivado tool for synthesis, place & route, and bitstream generation;

Debugging and optimizing FPGA power and resource consumption;

Verification and Validation.

Technical skills required: FPGA design in VHDL:

Experience in RTL design and implementation of complex modules in VHDL;

Knowledge of RTL coding best practices for area and performance optimization;

Experience in creating VHDL testbenches for functional verification.

Synthesis and Physical Implementation:

Experience with the Xilinx Vivado tool for synthesis, place & route, and bitstream generation;

Knowledge of the optimization of timing constraints (SDC/XDC) to ensure compliance with frequency requirements;

Debug and optimize FPGA power and resource consumption.

Verification and Validation (V&V):

Functional and temporal simulation with ModelSim/QuestaSim/Vivado Simulator;

Experience analyzing code coverage and functionality;

Advanced debugging using Integrated Logic Analyzer (ILA) and other FPGA debugging techniques;

Generate and manage test cases to verify how your design behaves in real-world scenarios.

Interfaces and Protocols:

Experience with standard communication protocols (SPI, I2C, UART, Ethernet, PCIe);

Knowledge of AXI (Advanced eXensible Interface) for high-speed communications between IP blocks.

Xilinx FPGA Experience:

Familiarity with Artix-7, Kintex-7, Zynq and later FPGAs;

Experience with Xilinx IP Core and automatic generation tools (IP Integrator, Block Design).

Workflow Management and Automation:

Use of Tcl scripting for the automation of synthesis and implementation flows;

Experience with version control systems (Git, SVN) for code management.

Optional technical skills:

Experience with MicroBlaze or soft-core RISC-V on FPGAs

Knowledge of HLS (High-Level Synthesis) for FPGA design in C++;

Experience with tools for the analysis of the power and thermals of FPGA devices;

Knowledge of DO-254 for the certification of FPGA systems in the avionics/military field;

Experience with formal verification tools for FPGAs.

Required education: Bachelor's or Master's degree in computer engineering or similar.

The ideal candidate is a proactive person with strong skills in problem solving and team working.

What we offer:

Opportunity to experiment in an international, young and dynamic context;

Stimulating work environment that fosters professional growth;

Position open to candidates without distinction of gender, pursuant to Legislative Decree 198/2006.

The company promotes equal opportunities and values diversity in all its forms.

#J-18808-Ljbffr